COMPSCI 110 Introduction to Computer Systems
COMPSCI 110 Overview
- University of Auckland
- S2 2026
- 11 chapters
- Computer Science
COMPSCI110 Introduction to Computer Systems is the University of Auckland's Stage I tour through every layer of a modern computer — 15 points, and compulsory for the Computer Science major (you cannot take it with or after COMPSCI210).
- Assessed by Final Exam 50% · Mid-Semester Test 20% · Assignments 20% · Essays 8% · Tutorials 2%
- Key terms Two's complement, Logic gate & truth table, Von Neumann architecture, Opcode & instruction set
- How to prepare Treat COMPSCI110 as eleven small skills, not one big idea, and drill the mechanical ones by hand until they are automatic…
What you get in the full COMPSCI 110 Exam Bible
- 11 chapters, 108 pages — every examinable topic
- 25 original practice questions, each with a model answer in the Final Exam format
- 11 worked examples, solved the way COMPSCI 110 marks
- 22 computed figures, redrawn from the course’s own numbers
- Exam-morning plan for the Final Exam (50%) — what to revise last, where marks are lost
Free on this page: assessment table, chapter map, one worked example, key terms, FAQ. The rest is in the full exam bible.
How COMPSCI 110 is assessed
| Component | Weight | Format |
|---|---|---|
| Final Exam | 50% | UoA S2 exam period; Inspera digital exam (IIB, Mode D), 36 questions / 50 marks; covers Modules 1-4, 6-11 |
| Mid-Semester Test | 20% | In-semester; covers the earlier modules including Module 5 (algorithms & pseudocode) |
| Assignments | 20% | Programming/analysis assignments across the course (AI-permitted 'uncontrolled' lane) |
| Essays | 8% | Short written essays (AI-permitted lane) |
| Tutorials | 2% | Weekly group-work tutorials |
What other students are asking about COMPSCI 110
- Where can I find lecture notes or study guides for COMPSCI 110 at Auckland?
- The COMPSCI 110 study guide in AskSia Library covers Introduction to Computer Systems in 11 chapters, with the assessment table, a chapter-by-chapter topic map, key terms and a worked example, free to read on this page.
- Is there a final exam in COMPSCI 110, and how much is it worth?
- Yes. In the offering this AskSia Library guide is built from, Final Exam carries 50% of the COMPSCI 110 mark; the full split is Final Exam 50%, Mid-Semester Test 20%, Assignments 20%, Essays 8%, Tutorials 2%.
- What does COMPSCI 110 cover on boolean logic & digital circuits?
- In AskSia Library's COMPSCI 110 guide, the Boolean Logic & Digital Circuits chapter explains truth tables · AND/OR/NOT/NAND/NOR · transistors · De Morgan · sum-of-products · adders & subtractors (Module 2).
- What does COMPSCI 110 cover on computer organisation?
- In AskSia Library's COMPSCI 110 guide, the Computer Organisation chapter explains the von Neumann model · ALU, registers & datapath · the control unit (PC/IR/MAR/MDR) · RAM & the decoder (Module 3).
- What does COMPSCI 110 cover on assembly & machine code?
- In AskSia Library's COMPSCI 110 guide, the Assembly & Machine Code chapter explains the 16-instruction set · desk checking · assembly ↔ machine code · the two-pass assembler & symbol table (Module 4).
What COMPSCI 110 covers
The whole course → one exam-ready map. COMPSCI110 is assessed on a 50% final exam (a digital Inspera exam sat on a computer via the Inspera Integrity Browser, 36 questions for 50 marks) plus a 20% mid-semester test and 30% of practical coursework (assignments, essays and tutorials). The final exam covers Modules 1–4 and 6–11; Module 5 (algorithms & pseudocode) is examined only in the mid-semester test.
Each chapter below links to its free guide.
Data as Binary
Binary/octal/hex · binary arithmetic · signed numbers (sign-magnitude, one's & two's complement) · binary fractions & floats (Module 1)Module 1 of University of Auckland COMPSCI110 is the foundation: how every kind of data — whole numbers, negative numbers, fractions, text, sound and images — is encoded as binary.
- Positional bases: binary (2), octal (8), hexadecimal (16) and decimal; convert by powers, by repeated ÷2 (read remainders bottom-up), and by grouping bits in 3s → octal / 4s → hex
- Binary addition (1+1 = 10, carry 1) and subtraction (borrow adds the base); arithmetic overflow when a value exceeds the fixed bit-width
- Three signed representations: sign-magnitude, one's complement and two's complement — the MSB is the sign bit in all three
- Ranges: two's complement is asymmetric −2ⁿ⁻¹ … 2ⁿ⁻¹−1 with ONE zero; sign-magnitude and one's complement are ±(2ⁿ⁻¹−1) with TWO zeros
- Binary fractions (2⁻¹, 2⁻², …), left/right shift as ×2 / ÷2, and the textbook 16-bit floating-point format (sign · mantissa · exp-sign · exponent)
- Text encoding: 7-bit ASCII (128 values) and variable-width UTF-8 (1–4 bytes, keeps ASCII); upper/lower case differ by one bit
Boolean Logic & Digital Circuits
Truth tables · AND/OR/NOT/NAND/NOR · transistors · De Morgan · sum-of-products · adders & subtractors (Module 2)Module 2 of University of Auckland COMPSCI110 is where computation physically happens: the logic gates (AND, OR, NOT, NAND, NOR), their truth tables, transistors as switches, De Morgan's laws, and the recipe for turning any truth table into a circuit — the sum-of-products method.
- The five gates and their truth tables: AND (a·b), OR (a+b), NOT (Ā), NAND, NOR — transcribe exactly, and note NOT flips 0↔1
- Transistors as solid-state switches (NOT = 1, NAND/NOR = 2, AND/OR = 3 transistors); n-input functions (2 inputs → 2⁴ = 16 possible functions)
- Functional completeness: NAND and NOR can each build any circuit (tie both inputs together to get NOT)
- De Morgan's laws: A+B = Ā·B̄ and A·B = Ā+B̄ (and their complemented variants)
- Combinational circuits (output depends only on current inputs) and the sum-of-products algorithm: one AND term per true row, OR them together
- Arithmetic hardware: the 1-CE equality circuit (a·b)+(ā·b̄), the full adder (sum + carry), and two's-complement subtraction (invert b, carry-in 1)
Computer Organisation
The von Neumann model · ALU, registers & datapath · the control unit (PC/IR/MAR/MDR) · RAM & the decoder (Module 3)Module 3 of University of Auckland COMPSCI110 assembles the gates of Module 2 into a whole machine — the von Neumann model.
- The von Neumann model: stored-program concept (instructions and data share one memory), four subsystems (Memory, I/O, ALU, Control Unit = CPU is ALU+CU), sequential execution and the 'von Neumann bottleneck'
- The ALU: arithmetic, comparison and logic operations, working registers, and the datapath (registers → circuits → registers); selecting an operation with a decoder or (in practice) a multiplexor
- Instruction format [opcode][address field(s)] and bit-width sizing: opcode bits, operand/register bits from the register-file size
- Control-unit registers: PC (next instruction address), IR (current instruction), and the clock alternating 0/1 to settle circuits then update state
- Memory: RAM/ROM, cell (byte) addressing, maximum memory = 2ᴺ for an N-bit address, and the MAR/MDR pair for fetch (non-destructive) and store (destructive)
- The address decoder and 2-D (row/column) memory that cuts decoder lines from 2ᴺ to 2×2^(N/2)
Assembly & Machine Code
The 16-instruction set · desk checking · assembly ↔ machine code · the two-pass assembler & symbol table (Module 4)Module 4 of University of Auckland COMPSCI110 programs the bare machine of Module 3. You learn the textbook 16-instruction set (LOAD through HALT), how to desk-check a program by hand as the CPU would, how to translate between assembly and machine code (a 4-bit opcode plus a 12-bit address), and how a two-pass assembler builds a symbol table to resolve labels.
- The 16-instruction set (Figure 6.5): LOAD/STORE/CLEAR, ADD/SUBTRACT/INCREMENT/DECREMENT, COMPARE, the JUMP family, IN/OUT, HALT — with a single arithmetic register R
- Register-R semantics: ADD X means R + CON(X) → R; COMPARE X sets the GT/EQ/LT condition codes; ADD/SUBTRACT use 16-bit two's complement
- Program structure: .BEGIN … instructions … HALT … .DATA pseudo-ops … .END, and LABEL: .DATA 0 binding a name to an address
- Desk checking: stepping through a program by hand, tracking R, memory cells and the GT/EQ/LT flags after each instruction
- Machine-code format: 4-bit opcode + 12-bit address packed into 16 bits (e.g. IN at address 9 → 1101 0000 0000 1001 = D009₁₆)
- Assembler vs compiler: assembly → machine code is one-to-one (table lookup); high-level → machine code is one-to-many
Algorithms & Pseudocode
Algorithm definition · sequence, selection & iteration · desk-checking pseudocode (Module 5 — mid-semester test only)Module 5 of University of Auckland COMPSCI110 steps back from hardware to the idea of a computation itself: what an algorithm formally is, and how to express one in pseudocode before writing real code, using just three building blocks — sequence, selection and iteration.
- The formal definition of an algorithm: a well-ordered collection of unambiguous, effectively computable operations that produces a result and halts in finite time
- Pseudocode's role: between natural language (ambiguous) and a programming language (fussy); it designs algorithms and is not executed
- The three primitive constructs — Sequential (one task at a time), Conditional/Selection (if-then-else on a True/False test), Iterative/Loop (while: a continuation condition + a body)
- while vs do/while: while may run the body zero times; do/while runs the body at least once
- Assignment uses ← (an arrow); = is reserved for comparison — a common trap in trace questions
- Desk-checking pseudocode with a trace table: track each variable's value line by line to predict the output
Computer Networks
Protocols · packet vs circuit switching · the ISP hierarchy · the four delay sources (d_trans = L/R) · the 5-layer model (Module 6)Module 6 of University of Auckland COMPSCI110 covers how computers communicate over the Internet: protocols, the choice between packet and circuit switching, the tiered ISP hierarchy, the four sources of packet delay (with the examinable formula d_trans = L/R), throughput and bottleneck links, and the five-layer Internet model with encapsulation.
- Protocols (rules for message format, order and actions) and guided vs unguided media
- Packet switching (dynamic sharing, no reservation, buffers can drop packets) vs circuit switching (a fixed, guaranteed reserved rate)
- Forwarding (move a packet input-port → output-port via a local table) vs routing (compute the network-wide path)
- The ISP hierarchy: access ISPs can't all interconnect directly, so a tiered structure with tier-1 transit and IXPs; large content providers run private networks
- The four sources of nodal delay: d_proc + d_queue + d_trans + d_prop, with d_trans = L/R and d_prop = d/s (s ≈ 2×10⁸ m/s)
- Throughput and the bottleneck link: end-to-end rate ≈ the minimum link rate on the path
Compilers
The four phases · tokens & token classes · BNF grammar · parse trees · semantic records (Module 7)Module 7 of University of Auckland COMPSCI110 explains how a high-level program becomes machine code — a one-to-many translation that needs real linguistic analysis, unlike an assembler's table lookup.
- Compiler vs assembler: high-level → machine code is one-to-many and needs syntax + semantic analysis; assembly → machine code is one-to-one
- The four phases: I lexical analysis (scanner), II parsing (grammar → parse tree), III semantic analysis & code generation, IV code optimisation
- Lexical analysis: characters → tokens, discarding whitespace and comments (comments are never tokens)
- Tokens and token classes (keywords, symbols/identifiers, operators, brackets, numbers, literals); == is a single token distinct from =
- The scanner does NOT check syntax — an illegal sequence still tokenises; keywords like else are classed as keywords even when misused
- Parsing: BNF grammar, productions and non-terminals, and building a parse tree that shows the statement's structure
Operating Systems
The process manager · FCFS & Round-Robin scheduling · the time quantum & context switching · deadlock & resource-allocation graphs (Module 8)Module 8 of University of Auckland COMPSCI110 is about how the OS manages a machine's resources: the process manager and process states, CPU scheduling (First-Come-First-Served and Round-Robin), the time quantum, context switching and CPU efficiency, and deadlock — its conditions and detection with a resource-allocation graph.
- OS components: process, memory, device, file and network managers plus the command interpreter — abstracting hardware into processes, memory and files
- Processes and states: CREATE → READY → RUN → (WAIT) → FINISH, with a ready queue and a waiting queue managed by the scheduler
- FCFS scheduling (longest-waiting runs to completion) vs Round-Robin (FCFS + preemption on a fixed time slice/quantum, then back to the tail of the ready queue)
- Computing average waiting time from a Round-Robin schedule
- Context switching (save context → load next) and CPU efficiency = slice / (slice + context-switch time) × 100
- The time-slice trade-off: too large starves others, too small wastes time on context switches
Security & Cryptography
Caesar & substitution ciphers · matrix block cipher (V·M mod n) · symmetric (DES/AES) · asymmetric (RSA, Diffie-Hellman) · certificates (Module 9)Module 9 of University of Auckland COMPSCI110 covers keeping data safe: classical ciphers (the Caesar/substitution cipher and the matrix block cipher, V·M mod n), the block-vs-stream and symmetric-vs-asymmetric taxonomies, symmetric algorithms (DES, 3DES, AES), public-key encryption (RSA and Diffie-Hellman key exchange) and digital certificates.
- Caesar / substitution cipher: shift each letter a fixed distance; only 25 keys, so frequency analysis and brute force break it, and it preserves the plaintext 'fingerprint'
- Matrix block cipher: map A=0…Z=25, group into blocks, encrypt ciphertext = V·M mod n, decrypt with the inverse M′ (M·M′ = I mod n)
- Diffusion: a block cipher spreads each plaintext letter across several ciphertext letters, destroying structure
- Cipher taxonomy by processing: block (a block at a time) vs stream (element by element)
- Cipher taxonomy by keys: symmetric (one shared secret key — key distribution is the challenge) vs asymmetric / public-key
- Symmetric algorithms: DES (56-bit key, 64-bit block — now too small), 3DES (~168-bit), AES (128/192/256-bit keys, 128-bit block)
Turing Machines & Computability
The model · tape, states & the 5-tuple (i,j,k,s,dir) · halting vs non-halting · the Church-Turing thesis (Module 10)Module 10 of University of Auckland COMPSCI110 is the theory of what can be computed at all.
- What a model is (captures the essence, omits detail) and what any computing agent must do: read input, store/retrieve memory, act on instructions, output results
- The Turing machine (Alan Turing, 1936): a tape infinite in both directions, a finite set of states 1…k, and a set of instructions
- The 5-tuple instruction (i, j, k, s, direction): in state i reading symbol j, write k, change to state s, move left or right one cell
- Operating rules: begin in state 1, start on the leftmost non-blank symbol, no two rules share the same (state, symbol) pair, and if no rule applies the machine HALTS
- Halting vs non-halting: a machine halts at a (state, symbol) with no matching rule; it can loop forever if a rule always applies
- Valid (deterministic) instruction set: no duplicate (state, symbol) left-hand sides
Artificial Intelligence
The Turing test & Winograd schema · task types · neural networks & back-propagation (Module 11)Module 11 of University of Auckland COMPSCI110 closes the course with the question 'can machines think?' It covers the Turing test and the Winograd schema challenge, the kinds of tasks AI tackles, and an introduction to neural networks and the back-propagation learning algorithm.
- The Turing test (imitation game): a machine passes if a human interrogator cannot reliably tell it from a person by conversation alone
- The Winograd schema challenge: commonsense pronoun-resolution problems used as an alternative test of machine understanding
- Types of tasks AI addresses and what makes them hard for machines
- Neural networks: layers of simple artificial neurons connected by weighted links (conceptual — no numeric calculation examined)
- Back-propagation: the learning algorithm that adjusts the weights by propagating error backward through the network
- Robots and embodied AI as an application area
The course prescription is exactly that journey: the encoding of data and instructions, hardware, low-level programming, operating systems, applications and communications.
It builds bottom-up: how numbers, text and media become binary (Module 1); the logic gates and circuits that compute (Module 2); the von Neumann machine that runs them (Module 3); its assembly language (Module 4); algorithms and pseudocode (Module 5, mid-semester test only); then the systems layer — computer networks (Module 6), compilers (Module 7), operating systems (Module 8), security and cryptography (Module 9), Turing machines and computability (Module 10) and artificial intelligence (Module 11).
Assessment is split into a theory grouping and a practical grouping: theory is the 20% mid-semester test plus the 50% final exam — an in-person, invigilated digital exam sat on a computer via the Inspera Integrity Browser (IIB, Mode D), 36 questions for 50 marks, covering Modules 1–4 and 6–11. Practical is the assignments (20%), essays (8%) and tutorials (2%), all in the AI-permitted coursework lane.
To pass you must reach at least 50% overall AND pass each grouping separately. Confirm the exact exam date on Canvas and the University of Auckland Semester-2 2026 exam timetable.
COMPSCI 110 cheatsheet for the final exam
AskSia publishes a free COMPSCI 110 cheatsheet for the final exam, an A4 cheat sheet that follows the official permitted-materials rule for this assessment and condenses the topics in this guide. Open the COMPSCI 110 cheatsheet.
Worked example · free
Subtraction through the adder — 6 − 2 in 4-bit two's complement
- +1Represent both operands in 4-bit two's complement. +6 = 0110₂ and +2 = 0010₂ (both positive, so the sign bit is 0 and the pattern is the plain binary value).
- +1Turn the subtraction into an addition. a − b = a + (−b). To negate b in two's complement, invert every bit of b (one's complement) and add 1 — the circuit supplies that +1 as a carry-in of 1 to the least-significant bit. Invert 0010 → 1101.
- +1Add a + inv(b) + carry-in: 0110 + 1101 + 1. First 0110 + 1101 = 10011₂, then + 1 = 10100₂ (a 5-bit result with a carry out of the most-significant bit).
- +1Discard the carry out of the sign bit (two's-complement / modular arithmetic ignores it). The 4-bit answer is 0100₂ = +4. Check: 6 − 2 = 4. ✓
Key terms
- Two's complement
- The standard signed-integer representation: a negative value is formed by inverting every bit of the positive and adding 1. It has one zero and an asymmetric n-bit range −2ⁿ⁻¹ … 2ⁿ⁻¹−1 (e.g. 8-bit = −128 … +127), and it lets subtraction reuse the adder. Sign-magnitude and one's complement, by contrast, have two zeros and the symmetric range ±(2ⁿ⁻¹−1).
- Logic gate & truth table
- The primitive circuit elements — AND (a·b), OR (a+b), NOT (Ā), NAND and NOR — each defined by a truth table listing the output for every input combination. NAND and NOR are each functionally complete (any circuit can be built from one of them alone). A combinational circuit's output depends only on the current inputs (no stored state).
- Von Neumann architecture
- The stored-program model: instructions and data share one memory, the machine has four subsystems (Memory, Input/Output, ALU, Control Unit — the ALU and Control Unit together being the CPU), and instructions execute sequentially (the 'von Neumann bottleneck'). The control unit uses special registers PC, IR, MAR and MDR to run the fetch–decode–execute cycle.
- Opcode & instruction set
- An opcode is the unsigned integer that names a machine operation; an instruction packs an opcode with its address field(s). The textbook machine uses a 16-instruction set (4-bit opcode + 12-bit address = a 16-bit instruction), from LOAD (0000) through HALT (1111). Only one arithmetic register R exists, so ADD X means R + CON(X) → R.
- Packet switching
- The Internet's way of sharing a link: data is split into packets that share link capacity dynamically, with no reserved rate (unlike circuit switching, which reserves a fixed guaranteed rate for a call). A packet arriving at a busy link waits in the router's output buffer; if no buffer is free it is dropped (lost).
- Turing machine
- A minimal model of any computing agent: a tape infinite in both directions (holding input, output and memory), a finite set of states, and instructions written as 5-tuples (i, j, k, s, direction) — 'in state i reading symbol j, write k, go to state s, move left or right'. It halts when it reaches a (state, symbol) pair with no matching rule; the Church–Turing thesis holds that it can compute anything computable.
COMPSCI 110 FAQ
Is COMPSCI110 hard?
It is broad rather than deep — eleven modules that each speak a different dialect (binary arithmetic, logic circuits, assembly, networks, compilers, cryptography, Turing machines), so the difficulty is breadth and precision, not abstraction. The reliable mark-losers are the exact ones: two's-complement ranges, gate truth tables, the opcode table, the fetch order and d_trans = L/R.
Students who drill the small mechanical procedures until they are automatic — and keep up with the weekly rhythm rather than cramming — generally find it very manageable. It is a Stage I course pitched at first-years with no prior assumed.
Can AI help me with COMPSCI110?
Yes — for learning, not for doing graded work. Sia is an AI tutor trained on how COMPSCI110 is actually taught and assessed at the University of Auckland: it explains any step by step (a two's-complement conversion, a sum-of-products circuit, a Round-Robin schedule, a compiler tokenisation), checks your reasoning and quizzes you on fresh numbers.
One hard rule: the final exam and mid-semester test are in the controlled, no-AI lane, and University of Auckland academic-integrity rules apply — use AI to prepare before test day, never to produce answers for an assessment. Sia will not sit assessments for you.
Where can I find past exam papers / practice for COMPSCI110?
The course itself is the primary source: past mid-semester test papers (multiple years, including Summer/S1/S2 offerings) and exam-revision resources are posted on Canvas, and there is unlimited practice on the course's automated practice system.
This guide adds worked examples for every module — two's complement, gate circuits, assembly desk-checks, Round-Robin scheduling, block ciphers, Turing traces — solved line by line, and you can ask Sia to generate more questions in the same pattern for any chapter. Always confirm which past papers match the current syllabus on Canvas.
How is COMPSCI110 assessed, and what is the pass hurdle?
Five components in two groupings. Theory = the 20% mid-semester test + the 50% final exam (an Inspera digital exam, IIB Mode D, 36 questions / 50 marks). Practical = assignments 20% + essays 8% + tutorials 2%. To pass you must reach at least 50% overall AND pass BOTH groupings separately: the theory grouping needs at least 35 of 70 (50%) and the practical grouping at least 15 of 30 (50%).
Missing either hurdle fails the course even if your overall mark clears 50% — confirm the current rules on Canvas and the course outline.
What does the final exam cover, and is Module 5 on it?
The final exam covers Modules 1–4 and 6–11. Module 5 (algorithms & pseudocode) is examined only in the mid-semester test — it is NOT on the final exam, a split worth knowing so you spend revision time where the marks are.
The final's per-module weighting leans toward the systems modules: Operating Systems (8 marks) and Compilers (7 marks) are the heaviest, followed by Security and Turing Machines (6 each), Networks and AI (5 each), then Binary (4) and the Logic/Organisation/Assembly modules (3 each). Confirm the exact date on Canvas and the UoA Semester-2 exam timetable.
Questions students ask in each COMPSCI 110 chapter
- What's the difference between one's and two's complement?
- Both put the sign in the leading bit and both negate by inverting bits, but two's complement adds 1 after inverting. That single +1 removes the duplicate zero (two's complement has one zero, the others have +0 and −0) and makes the range asymmetric: n-bit two's complement runs −2ⁿ⁻¹ … 2ⁿ⁻¹−1, while one's complement and sign-magnitude run ±(2ⁿ⁻¹−1). Two's complement wins in practice because subtraction can reuse the adder — you never need separate subtractor hardware. Chapter 01 · Data as Binary
- What does it mean that NAND (or NOR) is 'functionally complete'?
- It means you can build any digital circuit using only that one gate type. If you tie both inputs of a NAND together it behaves as a NOT; with NOT plus NAND you can make AND and OR, and from AND, OR and NOT you can implement any truth table. NOR has the same property. That is a genuinely useful fact in hardware — a fabrication process only has to make one kind of gate really well. Chapter 02 · Boolean Logic & Digital Circuits
- What are the four subsystems of the von Neumann model?
- Memory (stores both instructions and data), Input/Output (moves data in and out), the Arithmetic-Logic Unit (does the computing) and the Control Unit (sequences everything). The ALU and Control Unit together are what we call the CPU. The model's other two defining features are the stored-program concept and sequential execution of instructions. Chapter 03 · Computer Organisation
- How do I translate an assembly instruction to machine code?
- Split the instruction into its opcode and its operand. Look the opcode up in Figure 6.5 to get its 4-bit code, encode the operand's address as a 12-bit binary number, and concatenate them into a 16-bit word (opcode in the top 4 bits, address in the low 12). You can then read the 16 bits as four hex nibbles. Instructions with no operand — HALT and the .BEGIN/.END/.DATA directives — leave the address field as zeros. Chapter 04 · Assembly & Machine Code
- Is Module 5 on the final exam?
- No. Algorithms & pseudocode (Module 5) is assessed only in the mid-semester test, not on the final exam — the final's per-module breakdown covers Modules 1–4 and 6–11 and omits Module 5 entirely. So study it fully for the test, but during final-exam revision you can safely spend that time on the heavier exam modules such as Operating Systems and Compilers. Always confirm the current split on Canvas. Chapter 05 · Algorithms & Pseudocode
- What are the four sources of packet delay?
- Processing delay (the router checks the packet and picks an output link — usually sub-millisecond), queuing delay (waiting behind other packets, which grows with congestion), transmission delay d_trans = L/R (pushing the bits onto the link) and propagation delay d_prop = d/s (the bits travelling the link's length). Their sum is the nodal delay at one hop; end-to-end delay adds up the nodal delays along the path. Chapter 06 · Computer Networks
- What are the four phases of a compiler?
- Lexical analysis (the scanner turns characters into tokens), parsing (checks the tokens against the grammar and builds a parse tree), semantic analysis & code generation (attaches meaning and emits machine instructions) and code optimisation (improves the result's time or space). The first two deal with form, the third with meaning and translation, and the fourth with efficiency. Chapter 07 · Compilers
- What's the difference between FCFS and Round-Robin scheduling?
- FCFS runs each process to completion in arrival order — no interruptions, so a long early job blocks everything behind it. Round-Robin adds preemption: each process gets at most a fixed time slice, then goes to the back of the ready queue if it isn't done, so the CPU rotates among all ready processes. Round-Robin is more responsive for interactive work; FCFS is simpler but can make short jobs wait a long time. Chapter 08 · Operating Systems
- What's the difference between symmetric and asymmetric encryption?
- Symmetric encryption uses one shared secret key for both encryption and decryption — fast, but you must somehow deliver that key securely (the key-distribution problem). Asymmetric (public-key) encryption uses a key pair: the public key encrypts and can be published, while only the private key decrypts. That neatly solves key distribution, at the cost of being slower — which is why real systems often use public-key crypto to exchange a symmetric key and then switch to the faster symmetric cipher. Chapter 09 · Security & Cryptography
- What are the parts of a Turing machine?
- Three things: a tape that is infinite in both directions (each cell holds one symbol and the tape doubles as input, output and memory), a finite set of states numbered 1…k, and a finite set of instructions written as 5-tuples. A read/write head sits over one cell; the instructions tell it what to write, which state to move to, and whether to step left or right. That minimal setup is enough to model any computation. Chapter 10 · Turing Machines & Computability
- What is the Turing test?
- It's Alan Turing's proposal for deciding whether a machine can 'think', framed as an imitation game: a human judge converses by text with a hidden machine and a hidden human and tries to tell them apart. If the judge can't reliably identify the machine, it passes. The key feature is that it judges behaviour (conversation) rather than internal mechanism — a machine passes by acting indistinguishably from a person, regardless of how it does so. Chapter 11 · Artificial Intelligence
How to study for the exam
Treat COMPSCI110 as eleven small skills, not one big idea, and drill the mechanical ones by hand until they are automatic — that is where the marks are. From Module 1, practise base conversions and two's complement on paper (the invert-then-add-1 rule, and the asymmetric −2ⁿ⁻¹ … 2ⁿ⁻¹−1 range) because two's complement is the single biggest mark-loser.
Keep a one-page reference of the things that must be exact: the AND/OR/NAND/NOR truth tables, the 16-instruction opcode table, the fetch order PC→MAR / FETCH / MDR→IR / PC+1, d_trans = L/R, the compiler token classes, and the CPU-efficiency formula slice/(slice+switch).
For the 20% mid-semester test (restricted book, one A4 sheet, one hour, MCQ), remember it is the ONLY place Module 5 pseudocode is examined — rehearse trace tables for sequence/selection/iteration. Then weight your exam revision by marks: give Operating Systems (8) and Compilers (7) the most reps, and don't neglect the 6-mark Security and Turing modules.
Sit the released past papers on the practice system in timed conditions, and because both the test and the exam are on Inspera, get comfortable with the digital question types (matching, inline choice, multiple response).
Exam week, reduce everything to the reference sheet and re-derive one worked example per module from a blank setup — if you can reproduce the two's-complement subtraction, a sum-of-products circuit, an assembly desk-check and a Round-Robin schedule cold, you are ready.
Your AI Computer Science tutor for COMPSCI 110
Stuck on a hard COMPSCI 110 question? Sia is AskSia’s AI Computer Science tutor — ask any COMPSCI 110 Introduction to Computer Systems question and get a clear, step-by-step explanation grounded in how the course is actually taught and assessed. Read this whole study guide free, then take your hardest questions to Sia.