University of Sydney · FACULTY OF ELECTRICAL ENGINEERING

ELEC5206 Chap.10 DC Link Design and Hysteresis Current Control

- one subject, every graph, every model, every mark
8 Chapters4-page Bible
Our own words - no uploaded lecturer files
Updated for this semester
Chapter 10 of 14 · ELEC5206

DC Link Design and Hysteresis Current Control

The DC link is the capacitor bank between the PV side converter and the grid side converter. In a single-phase system the grid takes power as a pulsating sine-squared waveform while the PV side supplies it steadily, so the capacitor carries a ripple power at twice line frequency and the DC-link voltage peaks at a quarter and three quarters of each grid half-cycle.

Integrating that ripple between the peaks gives the sizing formula CDC = Pdc/(ωbΔVDCVdc); in balanced three phase the ripple cancels. The second lecture builds from on-off control to hysteresis control, in which a tolerance band trades steady-state error against switching frequency, and designs the band with a comparator and three resistors.

Hysteresis control returns in the next chapter as the grid current regulator. The comparator design is worked twice, once for the lecture's 48 V supply and once for a 24 V supply of our own, and the chapter explains why the same law that regulates a cooktop is most useful in power electronics for regulating currents.

In this chapter

What this chapter covers

  • 01

    The DC link as an energy buffer between two converters

  • 02

    Single-phase power ripple at twice line frequency

  • 03

    Where the DC-link voltage peaks in each half-cycle

  • 04

    Deriving and applying the DC-link capacitance formula

  • 05

    Why balanced three-phase systems avoid the ripple

  • 06

    On-off control and its uncontrolled switching frequency

  • 07

    The hysteresis band and its trade-off

  • 08

    Comparator design with a feedback resistor

Worked example · free

Ripple from a capacitor that is already installed

Q [3 marks]. A single-phase inverter delivers 2 kW from a 400 V DC link with 2.2 mF of capacitance on a 50 Hz grid. Find the peak-to-peak DC-link ripple and where in the grid cycle the voltage is highest. The 3-mark allocation is our own practice weighting, not the university's marking scheme.
  • 1Rearrange the sizing formula: ΔVDC = Pdc/(ωbVdcCDC).
  • 1ΔVDC = 2000/(314.2 × 400 × 0.0022) = 2000/276.5 = 7.2 V.
  • 1The voltage peaks where the capacitor stops charging, at ωt = π/4, and bottoms at 3π/4, so the ripple repeats at 100 Hz.
About 7.2 V peak-to-peak, highest at 45° and lowest at 135° of each grid half-cycle.
Sia tip — Use the angular frequency 2π × 50 = 314.2 rad/s, not 50, in the denominator; that slip makes the answer six times too large.
Glossary

Key terms

Double-line-frequency ripple
The DC-link voltage oscillation at twice the grid frequency caused by single-phase power pulsation.
Hysteresis band
The tolerance ±ε around a reference within which a hysteresis controller keeps its last switching state.
On-off control
A feedback law that applies maximum output for positive error and minimum output for negative error.
Feedback resistor
The resistor RF from a comparator output that shifts its threshold to create the hysteresis band.
FAQ

DC Link Design and Hysteresis Current Control FAQ

Why does a single-phase inverter need a large DC-link capacitor?

With unity power factor the grid power is the product of the voltage and current amplitudes times sin²ωt, which pulses at twice line frequency around its average, while the PV side supplies steady power. The capacitor must absorb and return the difference every half-cycle, and holding the resulting ripple to a few volts needs millifarads.

What does the hysteresis band trade off?

A narrow band keeps the controlled variable close to its reference, reducing steady-state error and distortion, but the variable crosses the band edges more often, so the switching frequency rises. A wider band lowers switching frequency at the cost of accuracy.

Where is hysteresis control used in power electronics?

The lecture lists the inductor current of boost and buck-boost converters, motor drives and the current regulation of grid-side inverters, as well as everyday temperature control in cookware. It notes that regulating a buck output voltage works but is not the best showcase.

How is the hysteresis band scaled through a voltage divider?

The comparator sees the divided signal, not the output itself, so the allowed output ripple must be scaled by the same ratio. In the lecture's example a 48 V output read as 2.5 V turns a 1 V tolerance into a band of 1 × 2.5/48 = 0.0521 V at the comparator.

Study strategy

Exam move

Sketch the three power waveforms over one grid cycle and mark where the DC-link voltage peaks, then derive the capacitance formula once from the energy swing. Practise sizing and the reverse ripple calculation with your own numbers. For hysteresis control, learn the switching law in both forms, then work the comparator design end to end: reference, divider, scaled band and feedback resistor, with the low-side check.

Always state the ripple frequency, twice the grid frequency, alongside the ripple size.

Working through DC Link Design and Hysteresis Current Control in ELEC5206? Sia is AskSia’s AI Electrical Engineering tutor — ask any ELEC5206 DC Link Design and Hysteresis Current Control question and get a clear, step-by-step explanation grounded in how ELEC5206 is taught and assessed. Read this chapter free, then take your hardest questions to Sia.

A+Everything unlocked
Unlocks this Bible + all 134 of your University of Sydney subjects - and 1,000+ Bibles across every Australian university.
Sia - your ELEC5206 tutor, unlimited, worked the way the exam marks it
The full 4-page Bible + practice bank with worked solutions
Chrome extension - sync your LMS so Sia knows your deadlines
Bilingual EN / Chinese on every Bible and every Sia answer
$0.99 Trial
30-day money-back · cancel in one tap · how it works