University of Queensland · FACULTY OF ELECTRICAL ENGINEERING

ELEC4410 Chap.7 Buck Converters and Filter Design

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Chapter 7 of 9 · ELEC4410

Buck Converters and Filter Design

The buck converter reduces a DC input by alternating between two inductor-voltage states. During the on interval the source supplies the inductor and load; during the off interval stored inductor energy continues through the freewheel path. In continuous steady state, average inductor voltage over one period is zero.

Applying volt-second balance gives the ideal relation Vout = D Vin.

Duty ratio begins the design but does not size the energy storage. Inductor current slope equals applied inductor voltage divided by inductance, so the on-state voltage, duty, frequency and permitted peak-to-peak ripple set L. Raising frequency can reduce the required inductance, while simultaneously changing switching loss and EMI.

State whether ripple is peak-to-peak before substitution.

The output capacitor accepts the difference between inductor and load current. Under the triangular-ripple approximation, its capacitive voltage ripple is related to inductor ripple, switching frequency and capacitance. ESR adds another component.

Calculated L and C values therefore need rating, saturation, loss, ESR and measured-ripple checks before becoming hardware selections.

In this chapter

What this chapter covers

  • 01

    PWM states

  • 02

    On-state and freewheel intervals

  • 03

    Volt-second balance and duty ratio

  • 04

    Inductor peak-to-peak ripple

  • 05

    Capacitor ripple, ESR and ratings

Worked example · free

Size a 36 V to 12 V buck filter

Q [4 marks]. An ideal buck operates from 36 V to 12 V at 30 kHz. Limit inductor ripple to 0.30 A peak to peak and ideal capacitive ripple to 0.12 V. Find duty, L and C. Its marks are an AskSia study weighting, not an official university assessment scheme.
The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.ON: VL = Vin − Voutcurrent risesOFF: VL = −Voutdiode carries current
The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.
  • +1Use volt-second balance to obtain duty D = 12/36 = 0.333 and write the on-state inductor voltage as 24 V.
  • +2Calculate L = 24(0.333)/(30000 times 0.30) = 0.889 mH and C = 0.30/[8(30000)(0.12)] = 10.4 microfarads.
  • +1Select practical values upward and verify inductor saturation, capacitor ESR, device loss and measured ripple.
Ideal duty is D = Vout/Vin = 12/36 = 0.333. With 24 V across the inductor during the on interval, L = (36 - 12)(0.333)/(30000 times 0.30) = 0.000889 H, or 0.889 mH. Using the triangular capacitive-ripple approximation, C = 0.30/[8(30000)(0.12)] = 10.4 microfarads. Practical component choices should be rounded upward, but that does not finish the design. Check inductor current rating and saturation, capacitor voltage rating and ESR, semiconductor switching loss, and the measured peak-to-peak ripple at the intended load.
Sia tip — Label ripple peak to peak and carry switching frequency through both filter calculations.
Glossary

Key terms

Buck Converters and
A core ELEC4410 topic used to organise PWM states, duty ratio, volt-second balance, inductor ripple and capacitor sizing.
FAQ

Buck Converters and Filter Design FAQ

Why does a buck converter need an off-state current path?

Inductor current cannot change instantaneously. When the controlled switch opens, stored magnetic energy keeps current flowing through the freewheel path so the load current remains continuous under the assumed mode.

What happens to ideal inductance if frequency doubles?

For the same input, output, duty and permitted peak-to-peak ripple, the ideal required inductance halves. Switching loss and EMI do not stay fixed, so the frequency change still needs a complete design check.

Why can calculated capacitance underpredict output ripple?

The common triangular relation accounts for ideal capacitive charge balance. Real capacitor ESR adds a voltage component, and load changes, layout and operating mode can further alter the measured waveform.

Study strategy

Exam move

Redraw the two buck states until the inductor-voltage signs and current path are automatic. Derive the duty relation from volt-second balance rather than starting with Vout/Vin. On a second pass, write current slope for the on interval and show how peak-to-peak ripple sets L. Keep the capacitor derivation separate so inductor ripple is not confused with output-voltage ripple.

Recalculate the worked example after changing frequency and predict which component values move inversely. Then add a hardware column for saturation current, ESR, voltage rating, conduction loss and switching loss. A revision answer is finished only when it says which waveforms to inspect: gate command, switching node, inductor current and filtered output ripple.

Draw maximum, average and minimum inductor current on the same triangle and use the valley to test continuous conduction. Re-run the sizing at worst-case input and at a lighter load instead of checking nominal operation alone. After selecting standard L and C values, substitute those real values back into the ripple relations.

Add ESR ripple separately and state which measured trace would reveal disagreement with the ideal approximation Repeat the filter design after changing only switching frequency, and list the thermal and EMI checks that prevent the smaller ideal components from becoming an automatic recommendation.

Show the expected switching-node and inductor-current scales beside the numerical result before comparing them with hardware Finish by checking chosen component values against saturation, ESR, tolerance and the measured peak-to-peak ripple Distinguish calculated and selected component values.

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