University of Queensland · S2 2026 · FACULTY OF ELECTRICAL ENGINEERING

ELEC4410 Advanced Electronic and Power Electronics Design

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The Complete Exam Bible · S2 2026

ELEC4410 Overview

Advanced Electronic and Power Electronics Design
— derive the switching state, calculate the waveform, then verify the design
  • University of Queensland
  • S2 2026
  • 9 chapters
  • Electrical Engineering

ELEC4410 develops power-electronic design from switching states to tested hardware. The course begins with converter classification and the signal path through filters, power stage, controller and feedback.

  • Assessed by Problem set 5% · Computer labs 21% · Hardware labs 24% · Final exam 50%
  • Key terms Duty ratio, Firing angle, RMS value, THD
  • How to prepare Build preparation around derivation rather than formula recall alone.
  • Most asked Does the final exam have a hurdle?
Why read this guide

What you get in the full ELEC4410 Exam Bible

  1. 9 chapters, 30 pages — every examinable topic
  2. 25 original practice questions, each with a model answer in the Final exam format
  3. 9 worked examples, solved the way ELEC4410 marks
  4. 9 computed figures, redrawn from the course’s own numbers
  5. Exam-morning plan for the Final exam (50%) — what to revise last, where marks are lost

Free on this page: assessment table, chapter map, one worked example, key terms, FAQ. The rest is in the full exam bible.

ELEC4410 · University of Queensland
An independent, AskSia-authored study guide. AskSia is not affiliated with, endorsed by, or sponsored by University of Queensland; the course code and name are used for identification only.
Assessment

How ELEC4410 is assessed

ComponentWeightFormat
Problem set5%Submission through Blackboard
Computer labs21%Three Matlab/Simulink laboratory activities submitted as one report
Hardware labs24%Three in-person laboratories weighted equally
Final exam50%In person; at least 40% on the exam is required for grade 4 or above

Assessment structure

Problem set 5%Computer 21%Hardware 24%Final exam 50%Published weights total 100%
Other students are asking · ELEC4410

What other students are asking about ELEC4410

Where can I find lecture notes or study guides for ELEC4410 at UQ?
The ELEC4410 study guide in AskSia Library covers Advanced Electronic and Power Electronics Design in 9 chapters, with the assessment table, a chapter-by-chapter topic map, key terms and a worked example, free to read on this page.
Is there a final exam in ELEC4410, and how much is it worth?
Yes. In the offering this AskSia Library guide is built from, Final exam carries 50% of the ELEC4410 mark; the full split is Problem set 5%, Computer labs 21%, Hardware labs 24%, Final exam 50%.
What does ELEC4410 cover on rms, harmonics and power quality?
In AskSia Library's ELEC4410 guide, the RMS, Harmonics and Power Quality chapter explains rMS quantities, active and reactive power, Fourier harmonics, THD and power factor.
What does ELEC4410 cover on power switch selection and gate drives?
In AskSia Library's ELEC4410 guide, the Power Switch Selection and Gate Drives chapter explains diodes, SCRs, MOSFETs, IGBTs, controllability, gate drive and switching limits.
What does ELEC4410 cover on switching losses and thermal design?
In AskSia Library's ELEC4410 guide, the Switching Losses and Thermal Design chapter explains conduction loss, switching loss, thermal resistance, heat sinks and junction temperature.
Weights, dates and every chapter are set out with their sources further down this page.
Contents · every chapter, one map

What ELEC4410 covers

Nine source-derived chapters connect converter states, device limits, thermal design and laboratory checks.

01

Converter Systems and Design Trade-offs

converter classes, feedback paths, filtering, losses, harmonics and EMI

A converter design begins by naming the electrical transformation: AC to DC, DC to DC, DC to AC or AC to AC. That choice determines the useful output waveform and the switching states needed to create it. The power stage does not work alone.

  • Converter classes
  • Feedback and gate-drive paths
  • Loss, harmonic and EMI trade-offs
  • Filter and thermal consequences
  • Measurement-led verification
In the full guide: 3 pages · 2 practice questions · 1 figure
02

RMS, Harmonics and Power Quality

RMS quantities, active and reactive power, Fourier harmonics, THD and power factor

RMS, average and peak values describe different properties of a waveform. RMS is the heating-equivalent magnitude and, for a sine wave, equals peak divided by the square root of two.

  • RMS quantities
  • Active, reactive and apparent power
  • Fourier components and THD
  • Displacement versus distortion factor
  • Spectrum-based power-factor diagnosis
In the full guide: 3 pages · 2 practice questions · 1 figure
03

Power Switch Selection and Gate Drives

diodes, SCRs, MOSFETs, IGBTs, controllability, gate drive and switching limits

A practical power switch is judged against electrical duties rather than by a memorised ranking. Start with blocking voltage, conducted current and current direction.

  • Diodes
  • SCR commutation and controllability
  • MOSFET and IGBT comparison
  • Gate charge, reference and dead time
  • Switching-loss and EMI verification
In the full guide: 3 pages · 2 practice questions · 1 figure
04

Switching Losses and Thermal Design

conduction loss, switching loss, thermal resistance, heat sinks and junction temperature

Semiconductor loss becomes a temperature rise, so electrical and thermal calculations form one chain. Conduction loss is accumulated while a device carries current through an on-state voltage or resistance.

  • Conduction loss
  • Switching energy and frequency
  • Junction-to-ambient resistance chain
  • Heat-sink resistance from a temperature limit
  • Thermal margin and waveform verification
In the full guide: 2 pages · 2 practice questions · 1 figure
05

Single-Phase Controlled Rectifiers

firing angle, conduction intervals, resistive and inductive loads, and average output

A controlled rectifier changes average DC output by delaying conduction from the natural forward-biased point. The firing angle names that delay, but the equation comes from the actual conduction window.

  • Firing angle
  • Conduction windows and device paths
  • Resistive versus inductive load current
  • Average output from waveform integration
  • RMS-to-peak and firing-angle checks
In the full guide: 2 pages · 2 practice questions · 1 figure
06

Three-Phase Rectifiers and Power Factor

phase selection, bridge symmetry, delayed firing, RMS current and power factor

Three-phase rectification assembles DC output from repeated phase or line-voltage segments. The efficient method is to identify one symmetric interval, write its contribution and multiply by the number of identical intervals per cycle.

  • Phase selection
  • Bridge conduction-pair sequence
  • Repeated-segment symmetry
  • Phase, line, RMS and peak conventions
  • Displacement and distortion effects
In the full guide: 2 pages · 2 practice questions · 1 figure
07

Buck Converters and Filter Design

PWM states, duty ratio, volt-second balance, inductor ripple and capacitor sizing

The buck converter reduces a DC input by alternating between two inductor-voltage states. During the on interval the source supplies the inductor and load; during the off interval stored inductor energy continues through the freewheel path.

  • PWM states
  • On-state and freewheel intervals
  • Volt-second balance and duty ratio
  • Inductor peak-to-peak ripple
  • Capacitor ripple, ESR and ratings
In the full guide: 2 pages · 2 practice questions · 1 figure
08

Boost and Buck-Boost Converters

boost and inverting buck-boost states, gain, duty, ripple and device stress

Boost and inverting buck-boost converters are distinguished by what the inductor connects to during the off interval. In a boost stage, the source and stored inductor energy combine to support an output above the input.

  • Boost and inverting buck-boost states
  • Boost energy-transfer interval
  • Inverting buck-boost polarity
  • Volt-second gain derivation
  • Duty, ripple and device-stress limits
In the full guide: 2 pages · 2 practice questions · 1 figure
09

Hardware Design and Verification

controller, H-bridge, filter, sensing, safe energisation and staged diagnosis

Hardware verification follows the signal path in a fixed direction: reference and controller, PWM outputs, gate driver, switching bridge, filter, sensors and load.

  • Controller
  • H-bridge and gate-driver path
  • Filter, sensing and load interfaces
  • Safe oscilloscope reference choices
  • Earliest-failed-stage diagnosis
In the full guide: 3 pages · 2 practice questions · 1 figure

It then revises RMS quantities, active and reactive power, harmonics, total harmonic distortion and power factor before comparing practical power switches and their gate drives. Loss calculations lead directly into thermal resistance, heat-sink selection and junction-temperature limits.

Controlled rectifiers are analysed from firing angle and conduction interval, while non-isolated DC-DC converters are derived from their on and off states, volt-second balance and ripple limits. The laboratory layer joins controller, H-bridge, filter, sensing and motor into a safe verification sequence. Assessment includes a problem set, computer laboratories, hardware laboratories and a final exam.

The final carries a published hurdle, so preparation should emphasise auditable working: state the topology, draw the switching interval, choose the correct relationship, substitute with units and test the physical direction of the result. This guide uses original questions with changed values while preserving the taught problem types.

It does not claim an exam duration, question count, aid rule or book condition because those details are not stated in the captured teaching materials. Confirm operational exam instructions on the current UQ course site.

Worked example · free

Sizing a buck-converter inductor

Q [4 marks]. A 36 V input is reduced to 12 V at 30 kHz with 0.30 A peak-to-peak current ripple. Find ideal duty and inductance. The four-point allocation is independent AskSia practice, not a published university marking scheme.
The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.ON: VL = Vin − Voutcurrent risesOFF: VL = −Voutdiode carries current
The two boxes show the inductor voltage in each switching state; equal positive and negative volt-seconds produce a repeating steady-state current.
  • +1Duty D = 12/36 = 0.333.
  • +2L = (36 − 12)(0.333)/(30,000 × 0.30) = 0.889 mH.
  • +1Select upward and verify current rating, saturation, loss and measured ripple.
The ideal duty is 0.333 and the calculated inductance is 0.889 mH.
Sia tip — Write peak-to-peak beside the ripple value before selecting the inductor equation.
Glossary

Key terms

Duty ratio
The fraction of each switching period for which the controlled switch is on.
Firing angle
The electrical angle that delays thyristor conduction from its natural forward-biased point.
RMS value
The heating-equivalent magnitude of a time-varying voltage or current.
THD
The RMS harmonic content relative to the fundamental component.
Power factor
Active power divided by apparent power, including displacement and distortion effects.
Conduction loss
Power dissipated while a semiconductor carries on-state current.
Switching loss
Energy dissipated during finite turn-on and turn-off transitions.
Thermal resistance
Temperature rise per unit heat flow along a thermal path.
Volt-second balance
The steady-state condition that average inductor voltage over a period is zero.
CCM
Continuous conduction mode, where inductor current does not fall to zero.
Gate drive
The interface that applies a suitable control waveform to a power switch.
Dead time
A deliberate interval preventing complementary switches from conducting together.
FAQ

ELEC4410 FAQ

How is the course assessed?

The published table assigns 5% to the problem set, 21% to computer labs, 24% to hardware labs and 50% to the final exam. Those numeric rows sum to 100% across the complete assessment structure.

Does the final exam have a hurdle?

Yes. The course material requires at least 40% on the final exam for grade 4 or above. A lower exam result caps the course mark at 49% and the grade at 3 under the published rule.

What should I know about the exam format?

The captured material identifies an in-person final but does not state duration, question count, permitted aids or open-book status. Check the current UQ course site for the sitting instructions before the examination period.

Which calculations matter most?

Practise RMS and power factor, controlled-rectifier averages, switching and conduction loss, thermal resistance, and buck, boost and buck-boost duty and ripple calculations. Show states, units and a physical check for each result you report.

How should I study converter waveforms?

Draw the on and off states first, label current paths and device voltages, then derive the interval equation. A memorised formula is only safe after topology and load assumptions match the actual circuit and conduction mode being analysed.

How should I prepare for hardware labs?

Trace controller, driver, bridge, filter, sensors and load in order. Verify connections before energising, use safe measurement references and power down before changing the circuit. Record each controlled test condition and observed waveform.

Chapter questions

Questions students ask in each ELEC4410 chapter

How do I classify a converter before analysing it?
State whether the source and required load output are AC or DC, then name the adjustable quantity. That one sentence separates rectification, inversion and DC conversion before any switch or filter equation is selected. Chapter 01 · Converter Systems and Design Trade-offs
When should I use RMS instead of average value?
Use RMS when the question concerns heating, current rating or comparable AC magnitude. Use average for a DC component over the stated interval, and never substitute a complete-cycle sine average for its nonzero RMS value. Chapter 02 · RMS, Harmonics and Power Quality
Why is a diode not the controlled switch in a PWM leg?
A diode has no command terminal that imposes the PWM sequence. It may carry freewheel current when circuit polarity permits, but controller timing cannot independently force its ordinary turn-on and turn-off events. Chapter 03 · Power Switch Selection and Gate Drives
How do conduction and switching loss differ?
Conduction loss accumulates during the on-state from current and device voltage or resistance. Switching loss occurs during transitions when voltage and current overlap, then scales with switching events per second. Chapter 04 · Switching Losses and Thermal Design
What does firing angle control in a rectifier?
It delays the start of controlled-device conduction relative to the natural forward-biased point. That shift changes the source-voltage segment applied to the load and therefore changes average output. Chapter 05 · Single-Phase Controlled Rectifiers
How does symmetry simplify a three-phase rectifier calculation?
Identify one repeated output segment, integrate or average that interval, then multiply by the number of identical contributions per period. This avoids re-deriving every phase segment separately. Chapter 06 · Three-Phase Rectifiers and Power Factor
Why does a buck converter need an off-state current path?
Inductor current cannot change instantaneously. When the controlled switch opens, stored magnetic energy keeps current flowing through the freewheel path so the load current remains continuous under the assumed mode. Chapter 07 · Buck Converters and Filter Design
What distinguishes boost from inverting buck-boost operation?
The off-state connection determines where inductor energy goes. Boost adds source and stored energy at a positive output, while the inverting buck-boost transfers energy to an output with reversed reference polarity. Chapter 08 · Boost and Buck-Boost Converters
What must be checked before first power is applied?
Verify wiring, polarity, grounds, supply limits, device orientation and instrument references. Complete the required connection check before energising, then power down before making any circuit alteration. Chapter 09 · Hardware Design and Verification
Study strategy

How to study for the exam

Build preparation around derivation rather than formula recall alone. For rectifiers, draw the source, firing angle, conduction interval and load-current path before integrating. For DC-DC converters, draw both switch states and use volt-second balance before sizing the inductor or capacitor.

Keep a separate loss and thermal sheet that connects conduction and switching dissipation to the full junction-to-ambient resistance chain. Rework each numerical example with changed values and check the result against a physical boundary: greater firing angle should reduce the stated resistive rectifier average, a lower thermal resistance should reduce junction temperature, and duty must stay between zero and one.

In laboratory preparation, rehearse the diagnostic order from command to gate, switching node, filter and load. Because the captured source gives no exam duration or aid rule, confirm those logistics on the current UQ course site rather than assuming them.

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