Monash University · FACULTY OF COMPUTER SCIENCE

FIT2100 Chap.10 Virtual Memory and IPC

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Chapter 10 of 12 · FIT2100

Virtual Memory and IPC

Virtual memory lets a process use a logical address space larger than its current physical allocation. Demand paging loads a page when a valid reference finds it absent. The fault handler validates the reference, chooses a frame, writes back a modified victim if needed, reads the page, updates translation state and restarts the instruction.

Excessive faults can create thrashing.

Inter-process communication solves a different boundary problem: separate processes normally cannot share private memory. Signals provide small notifications, message queues carry discrete messages, shared memory exposes common storage, pipes carry streams and sockets connect addressed endpoints.

Mechanism choice depends on host boundary, process relationship, data shape, copy cost and synchronisation responsibility.

In this chapter

What this chapter covers

  • 01

    Virtual address spaces

  • 02

    Demand paging

  • 03

    Page-fault handling

  • 04

    Effective access time

  • 05

    Thrashing

  • 06

    Signals and queues

  • 07

    Shared memory

  • 08

    Pipes and sockets

Worked example · free

Compute effective access time

Q [6 marks]. Normal memory access takes 80 nanoseconds, page-fault service takes 5 milliseconds and fault probability is 0.00002. Find effective access time in nanoseconds. The weighting shown here is not an official university mark allocation.
Demand paging.Demand paging. A large virtual set maps partly to resident frames; absent valid pages are recovered from backing storage on demand. virtual pagesresident framesbackingstorage
Demand paging. A large virtual set maps partly to resident frames; absent valid pages are recovered from backing storage on demand.
  • +2Convert the slow path: 5 milliseconds = 5,000,000 nanoseconds. Normal probability is 0.99998.
  • +2Weight both paths: 0.99998 × 80 = 79.9984 ns, and 0.00002 × 5,000,000 = 100 ns.
  • +2Add the contributions: 179.9984 ns, approximately 180 ns after final rounding. The rare fault more than doubles the average.
Effective access time is approximately 180 nanoseconds. The unit conversion must happen before probability weighting, and the interpretation is that a very rare millisecond path can dominate a nanosecond baseline.
Sia tip — Do not treat a translation-cache miss as a page fault. Identify the event whose probability and penalty the question provides.
Glossary

Key terms

Virtual Memory
The abstraction that separates a process address space from its currently resident physical frames.
Demand Paging
A policy that loads a page when it is referenced rather than placing every page in memory in advance.
Page Fault
An exception requesting operating-system service because a valid referenced page is absent from physical memory.
Thrashing
A condition where repeated page movement consumes more time than useful process execution.
Message Queue
A kernel-managed IPC object carrying discrete messages between processes.
Shared Memory
An IPC method mapping one memory region into several processes for low-copy data exchange.
FAQ

Virtual Memory and IPC FAQ

Is every page fault an invalid access?

No. A valid page may simply be absent under demand paging, in which case the operating system loads it and restarts the instruction. An invalid address or denied access is a protection failure and follows a different outcome.

Why can a tiny fault probability matter?

Fault service can take milliseconds while memory access takes nanoseconds. After unit conversion, the slow path may be millions of times larger, so even a small probability contributes substantially to the expected time.

What conditions cause virtual-memory thrashing?

Active working sets exceed available frames, so processes repeatedly evict pages they need again. The system performs heavy storage traffic while useful CPU progress falls. Reducing active load or increasing frames can address the cause.

When is shared memory a good IPC choice?

It suits repeated exchange of large local data where participants can implement disciplined synchronisation. Mapping reduces copying after setup, but concurrent readers and writers still need an ownership or locking protocol.

Study strategy

Assessment move

Connect page-fault handling to process states and device interrupts: the faulting process blocks while another can run, then becomes ready after I/O completes. Recompute expected-time examples only after converting units. For IPC choice, use a fixed decision path covering host boundary, relationship, message shape and synchronisation.

In a lab, explain why shared memory is fast and why that speed does not remove race conditions. Trace a valid absent-page reference as an exception path: preserve restart state, validate the address and operation, find backing storage, select a frame or victim, write a dirty victim if required, load the page, update translation and retry.

Beside each step, record whether the faulting process is running, blocked or ready and which interrupt can advance it. Contrast that trace with an invalid reference that must not be repaired by loading data. For effective-time problems, write every time in one unit before multiplying probabilities, check that probabilities sum to one and state whether the slow-path figure includes restart.

Interpret the result as a multiplier over normal access. For IPC revision, score candidate mechanisms on machine boundary, process relationship, data volume, message or stream semantics, copying, synchronisation and lifecycle. Add who creates, discovers and removes the object. Compare shared memory with a kernel-carried message for the same workload and explain the movement of both data and responsibility.

In laboratory design, include shutdown and error handling: close endpoints, remove persistent objects and show how a peer learns that communication ended. A fast successful transfer is incomplete evidence if cleanup or coordination can still fail.

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