University of Auckland · FACULTY OF ELECTRICAL ENGINEERING

ELECTENG 101 Chap.7 Analog-to-Digital Conversion

- one subject, every graph, every model, every mark
6 Chapters2-page Bible
Our own words - no uploaded lecturer files
Updated for this semester
Chapter 7 of 10 · ELECTENG 101

Analog-to-Digital Conversion

Analog-to-digital conversion separates time and amplitude decisions. Sampling selects observation times, quantisation maps each amplitude to a finite zone and encoding assigns a binary code. Reference range, bit depth and sampling rate address different requirements, so increasing one specification cannot repair a failure in another.

An n-bit converter offers two to the power n codes, and the nominal unipolar step follows from range divided by code count under the stated mapping convention. Boundary values require care because floor, rounding and endpoint rules can assign different codes. Inputs beyond range saturate at an endpoint and lose information about the amount of overdrive.

Signal conditioning should therefore place the useful span inside the reference range while using enough of that range to avoid wasting resolution. Fixed-width binary output connects this chapter to number representation and logic.

In this chapter

What this chapter covers

  • 01

    Sampling in time

  • 02

    Quantisation zones

  • 03

    Binary encoding

  • 04

    Reference voltage range

  • 05

    Bit depth and step size

  • 06

    Saturation and clipping

Worked example · free

Encode one conditioned voltage

Q [6 marks]. The mark allocation is not a published University assessment scheme; it belongs solely to this authored ADC exercise. A 4-bit ADC spans 0 to 8 V and uses floor quantisation. Encode 5.3 V.
Quantisation replaces a ramp with code steps.Quantisation replaces a ramp with code steps. A 3-bit converter over 0 to 4 V has eight codes and a nominal 0.5 V step.input 0 to 4 Vcode0.5 V steps111
Quantisation replaces a ramp with code steps. A 3-bit converter over 0 to 4 V has eight codes and a nominal 0.5 V step.
  • +2Sixteen codes give Δ = 8/16 = 0.5 V.
  • +2floor(5.3/0.5) = 10.
  • +2Decimal 10 is 1010₂.
1010₂.
Sia tip — Print the boundary mapping rule because endpoint conventions can differ.
Glossary

Key terms

Sampling rate
The number of analog signal observations taken per second.
Quantisation step
The input-amplitude interval associated with one adjacent code change.
Saturation
Clipping at the highest or lowest available code when input leaves the converter range.
FAQ

Analog-to-Digital Conversion FAQ

What does adding ADC bits improve?

It increases the number of amplitude codes and reduces nominal step size for a fixed reference range. It does not increase the sampling rate. Doubling the number of codes halves the ideal step width, but practical accuracy can still be limited by input noise, reference error and converter non-idealities that a bit-count calculation alone does not remove.

What happens above the reference range?

A saturating converter produces its top code, so the output cannot show how far above range the input has gone. The same ambiguity occurs below the lower limit at the bottom code. Preventing clipping requires a conditioned input range that includes expected signal extremes and tolerances, not merely the nominal midpoint behaviour.

Why condition a sensor before conversion?

Conditioning maps the useful sensor span into the ADC range, improving code use while preventing clipping and excessive loading. Gain expands a small span, offset moves its baseline, and buffering protects a high-resistance source. The endpoint design must leave appropriate headroom for component tolerance and noise rather than exactly touching both rails under ideal assumptions.

What is the difference between sampling and quantisation?

Sampling chooses the instants at which an analog waveform is observed, so it controls time resolution. Quantisation assigns each observed amplitude to one of a finite set of levels, so it controls amplitude resolution. Raising bit depth cannot recover time variation missed by sparse sampling, and faster sampling does not create finer amplitude codes.

Why must an ADC mapping rule be stated?

The step size alone does not specify what happens exactly at a threshold or at the top endpoint. A floor rule, nearest-level rule and centred-code model can differ on those cases. State the normalisation, integer operation and clipping limits, then apply the same rule consistently before converting the decimal code to binary.

How can I estimate quantisation error?

Compare the input with the representative value assigned to its code under the chosen convention. A nearest-level model often gives a half-step worst-case magnitude away from endpoints, while a floor interval has a different signed range. Describe the convention with the bound instead of presenting half a step as a universal fact.

Study strategy

Exam move

For every converter problem, write the number of codes, reference range, step rule and clipping limits before encoding a value. Convert the decimal code to exactly the declared bit width. Practise changing one specification at a time and explain whether it affects amplitude resolution, time resolution or range. Draw a small transfer staircase and label three ordinary intervals, both saturation regions and one exact boundary.

Encode values just below, at and just above that boundary using the declared rule. Next choose bit depth from a maximum allowed step and verify the neighbouring smaller width fails. Pair one ADC with a sensor-conditioning map and test minimum, nominal and maximum sensor outputs, including tolerance headroom. Finally compare two design changes: doubling sampling rate and adding one bit.

State which limitation each addresses and why neither can substitute for the other. Keep every output padded to the converter width so representation errors remain visible.

Working through Analog-to-Digital Conversion in ELECTENG 101? Sia is AskSia’s AI Electrical Engineering tutor — ask any ELECTENG 101 Analog-to-Digital Conversion question and get a clear, step-by-step explanation grounded in how ELECTENG 101 is taught and assessed. Read this chapter free, then take your hardest questions to Sia.

A+Everything unlocked
Unlocks this Bible + all 32 of your University of Auckland subjects - and 1,000+ Bibles across every Australian university.
Sia - your ELECTENG101 tutor, unlimited, worked the way the exam marks it
The full 2-page Bible + practice bank with worked solutions
Chrome extension - sync your LMS so Sia knows your deadlines
Bilingual EN / Chinese on every Bible and every Sia answer
$0.99 Trial
30-day money-back · cancel in one tap · how it works