UNSW Sydney · FACULTY OF ELECTRICAL ENGINEERING

ELEC4602 Chap.4 Amplifier Stages and Operational Amplifiers

- one subject, every graph, every model, every mark
6 Chapters5-page Bible
Our own words - no uploaded lecturer files
Updated for this semester
Chapter 4 of 10 · ELEC4602

Amplifier Stages and Operational Amplifiers

Week 4 develops single-stage amplifiers, cascodes, differential pairs and the two-stage operational amplifier. The useful exam skill is not naming topologies in isolation; it is choosing a signal path and explaining the trade-off that follows.

A common-source stage offers voltage gain with inversion, a follower emphasises buffering, a common-gate path changes the input relationship, and a cascode manages gain and node movement. Differential input stages turn two inputs into a controlled difference signal before later gain and output stages complete the amplifier.

In this chapter

What this chapter covers

  • 01

    Common-source signal inversion and gain

  • 02

    Common-drain buffering

  • 03

    Common-gate and cascode signal paths

  • 04

    Differential-pair steering

  • 05

    Two-stage operational-amplifier structure

  • 06

    Gain-bandwidth and slew-rate verification

Worked example · free

Choose a stage for a sensitive source

Q [4 marks]. An original design scenario needs to observe a high-impedance source without heavily loading it before passing the signal to a later gain stage. Select a suitable first-stage role and explain the verification evidence. The marks shown here are independent practice weighting, not an official university mark allocation.
Choose a stage on several axes.Choose a stage on several axes. The spokes show the recurring comparison dimensions: gain role, source loading, load drive, headroom and bandwidth. A topology is useful because of the requirement it satisfies, not because one spoke is always largest.stagegain roleinput loadingoutput driveheadroombandwidth
Choose a stage on several axes. The spokes show the recurring comparison dimensions: gain role, source loading, load drive, headroom and bandwidth. A topology is useful because of the requirement it satisfies, not because one spoke is always largest.
  • +1Translate the requirement into circuit language: the source must see a high input resistance and the following stage needs a driven signal.
  • +1Choose a buffering role, such as a common-drain stage, instead of maximising voltage gain at the source node.
  • +1Explain the cost: the buffer does not provide the same voltage gain as a common-source stage and consumes headroom and bias current.
  • +1Verify source loading, output range and the ability to drive the next stage across the relevant operating conditions.
The first decision is driven by loading, so a buffer role is appropriate. A common-drain stage can isolate the sensitive source and provide a lower-impedance drive to the following stage, while a separate stage supplies the required voltage gain. The answer should also state the headroom and gain limitations and name checks for source disturbance, output range and loading. Its four displayed points are an AskSia practice allocation rather than a university marking scheme.
Sia tip — Begin with the port requirement, not a favourite topology. Input loading, output drive, gain and headroom point to different stage choices.
Glossary

Key terms

Common-source stage
A common-source stage is an inverting MOS voltage-gain configuration whose output is taken at the drain.
Source follower
A source follower is a common-drain stage used primarily for buffering and impedance transformation.
Common-gate stage
A common-gate stage accepts its signal at the source and can provide a low input resistance and useful bandwidth.
Cascode
A cascode stacks devices to control internal node movement and improve selected gain or bandwidth behaviour.
Differential pair
A differential pair steers current according to the voltage difference between two inputs.
Slew rate
Slew rate describes the large-signal limit on how quickly an amplifier output can change.
FAQ

Amplifier Stages and Operational Amplifiers FAQ

How do I compare amplifier topologies in an exam answer?

Use the same axes for every option: input loading, voltage gain, inversion, output resistance, headroom and bandwidth. Then connect the winning axis to the stated requirement. A list of remembered properties is weaker than a choice that explains why one topology fits the source and load.

Why are differential pairs central to operational amplifiers?

They convert the difference between two input voltages into an internal signal while rejecting behaviour common to both inputs. That role supports feedback-based amplification and comparison. A complete explanation also tracks the bias current, output nodes and the stage that follows the pair.

What is the difference between gain-bandwidth and slew rate?

Gain-bandwidth belongs to the small-signal frequency response, while slew rate is a large-signal speed limit. A circuit can meet one and fail the other. Verification should therefore include both a small perturbation that probes frequency response and a sufficiently large transition that exposes output-rate limiting.

Study strategy

Exam move

Build a comparison matrix with the amplifier topologies as rows and input behaviour, gain direction, output drive, headroom and typical role as columns. Fill it from the signal path rather than memorised slogans: identify where the input enters, which node is held common and where the output is observed.

Then sketch a two-stage operational amplifier as functional blocks: differential input, gain stage, compensation path and output interface. For every practice scenario, translate the requirement into one of the comparison axes before choosing a topology. Follow that choice with a limitation, because strong design reasoning states what is sacrificed.

Separate small-signal and large-signal verification: use frequency response to test gain-bandwidth behaviour, and use a large output transition to reveal slew-rate limits. Finish by checking bias and output range, since a topology that looks correct symbolically can fail when a device loses its intended operating region. This method produces a reasoned answer rather than a catalogue of circuit names.

Add a source-and-load drill after the matrix. Change only the source resistance, required swing or load, then explain whether the original stage role still fits. For an op-amp response, mark the bias path, main gain node, compensation connection and driven output before interpreting a plot. Compare a small perturbation with a large step under the same feedback and load conditions.

If their limitations differ, name the internal resource responsible rather than reporting one speed number. End by writing a recommendation sentence that includes the selected topology, dominant requirement, accepted cost and the observation that could overturn the choice.

Working through Amplifier Stages and Operational Amplifiers in ELEC4602? Sia is AskSia’s AI Electrical Engineering tutor — ask any ELEC4602 Amplifier Stages and Operational Amplifiers question and get a clear, step-by-step explanation grounded in how ELEC4602 is taught and assessed. Read this chapter free, then take your hardest questions to Sia.

A+Everything unlocked
Unlocks this Bible + all 103 of your UNSW Sydney subjects - and 1,000+ Bibles across every Australian university.
Sia - your ELEC4602 tutor, unlimited, worked the way the exam marks it
The full 5-page Bible + practice bank with worked solutions
Chrome extension - sync your LMS so Sia knows your deadlines
Bilingual EN / Chinese on every Bible and every Sia answer
$0.99 Trial
30-day money-back · cancel in one tap · how it works
ELEC4602 · Microelectronic Design & Tech - independent study guide on the AskSia Library. More UNSW Sydney subjects · Microeconomics across all universities